Invention Application
US20140022848A1 NON-VOLATILE MEMORY HAVING 3D ARRAY OF READ/WRITE ELEMENTS AND READ/WRITE CIRCUITS AND METHOD THEREOF
有权
具有读取/写入元件的3D阵列的非易失性存储器及其读取/写入电路及其方法
- Patent Title: NON-VOLATILE MEMORY HAVING 3D ARRAY OF READ/WRITE ELEMENTS AND READ/WRITE CIRCUITS AND METHOD THEREOF
- Patent Title (中): 具有读取/写入元件的3D阵列的非易失性存储器及其读取/写入电路及其方法
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Application No.: US13973218Application Date: 2013-08-22
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Publication No.: US20140022848A1Publication Date: 2014-01-23
- Inventor: George Samachisa , Luca Fasoli , Yan Li , Tianhong Yan
- Applicant: SANDISK 3D LLC
- Applicant Address: US CA Milpitas
- Assignee: SANDISK 3D LLC
- Current Assignee: SANDISK 3D LLC
- Current Assignee Address: US CA Milpitas
- Main IPC: G11C16/06
- IPC: G11C16/06

Abstract:
A three-dimensional array is especially adapted for memory elements that reversibly change a level of electrical conductance in response to a voltage difference being applied across them. Memory elements are formed across a plurality of planes positioned different distances above a semiconductor substrate. A two-dimensional array of bit lines to which the memory elements of all planes are connected is oriented vertically from the substrate and through the plurality of planes. During sensing, to compensate for word line resistance, a sense amplifier references a stored reference value during sensing of a memory element at a given location of the word line. A layout with a row of sense amplifiers between two memory arrays is provided to facilitate the referencing. A selected memory element is reset without resetting neighboring ones when it is subject to a bias voltage under predetermined conditions.
Public/Granted literature
- US08824191B2 Non-volatile memory having 3D array of read/write elements and read/write circuits and method thereof Public/Granted day:2014-09-02
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