Invention Application
- Patent Title: ADAPTIVE MULTI-STAGE SLACK BORROWING FOR HIGH PERFORMANCE ERROR RESILIENT COMPUTING
- Patent Title (中): 适用于高性能误差计算的自适应多级滑块
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Application No.: US14045642Application Date: 2013-10-03
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Publication No.: US20140035644A1Publication Date: 2014-02-06
- Inventor: Chittoor PARTHASARATHY , Nitin CHAWLA , Kallol CHATTERJEE , Pascal URARD
- Applicant: STMicroelectronics SA , STMicroelectronics International N.V.
- Applicant Address: FR Montrouge NL Amsterdam
- Assignee: STMicroelectronics SA,STMicroelectronics International N.V.
- Current Assignee: STMicroelectronics SA,STMicroelectronics International N.V.
- Current Assignee Address: FR Montrouge NL Amsterdam
- Priority: IN37/DEL/2011 20110107
- Main IPC: H03K3/02
- IPC: H03K3/02

Abstract:
Adaptive scaling digital techniques attempt to place the system close to the timing failure so as to maximize energy efficiency. Rapid recovery from potential failures is usually by slowing the system clock and/or providing razor solutions (instruction replay.) These techniques compromise the throughput. This application presents a technique to provide local in-situ fault resilience based on dynamic slack borrowing. This technique is non-intrusive (needs no architecture modification) and has minimal impact on throughput.
Public/Granted literature
- US08994416B2 Adaptive multi-stage slack borrowing for high performance error resilient computing Public/Granted day:2015-03-31
Information query
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