EMBEDDED SILICON GERMANIUM N-TYPE FILED EFFECT TRANSISTOR FOR REDUCED FLOATING BODY EFFECT

Invention Application

US20140038368A1 EMBEDDED SILICON GERMANIUM N-TYPE FILED EFFECT TRANSISTOR FOR REDUCED FLOATING BODY EFFECT 有权

Title translation: 嵌入式硅锗锗型N型透明效应晶体管，用于降低浮体效应

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Patent Title: EMBEDDED SILICON GERMANIUM N-TYPE FILED EFFECT TRANSISTOR FOR REDUCED FLOATING BODY EFFECT
Patent Title (中): 嵌入式硅锗锗型N型透明效应晶体管，用于降低浮体效应
Application No.: US14049765

Application Date: 2013-10-09
Publication No.: US20140038368A1

Publication Date: 2014-02-06
Inventor: Leland CHANG , Isaac LAUER , Chung-Hsun LIN , Jeffrey W. SLEIGHT
Applicant: International Business Machines Corporation
Applicant Address: US NY Armonk
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
Current Assignee Address: US NY Armonk
Main IPC: H01L21/8238
IPC: H01L21/8238

EMBEDDED SILICON GERMANIUM N-TYPE FILED EFFECT TRANSISTOR FOR REDUCED FLOATING BODY EFFECT

Abstract:

A method for fabricating a semiconductor device includes forming a gate stack on an active region of a silicon-on-insulator substrate. The active region is within a semiconductor layer and is doped with an p-type dopant. A gate spacer is formed surrounding the gate stack. A first trench is formed in a region reserved for a source region and a second trench is formed in a region reserved for a drain region. The first and second trenches are formed while maintaining exposed the region reserved for the source region and the region reserved for the drain region. Silicon germanium is epitaxially grown within the first trench and the second trench while maintaining exposed the regions reserved for the source and drain regions, respectively.

Abstract(Chinese):

一种用于制造半导体器件的方法包括在绝缘体上硅衬底的有源区上形成栅叠层。有源区在半导体层内并掺杂有p型掺杂剂。围绕栅极堆叠形成栅极间隔物。在为源极区域保留的区域中形成第一沟槽，并且在为漏极区域保留的区域中形成第二沟槽。形成第一和第二沟槽，同时保持暴露为源极区域保留的区域和为漏极区域保留的区域。硅锗外延生长在第一沟槽和第二沟槽内，同时保持分别保留用于源区和漏区的区域。

Public/Granted literature

US08940591B2 Embedded silicon germanium N-type filed effect transistor for reduced floating body effect Public/Granted day:2015-01-27

Information query

Global Dossier Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺
H01L21/8238	........互补场效应晶体管，例如CMOS