发明申请
US20140042557A1 Device-Manufacturing Scheme for Increasing the Density of Metal Patterns in Inter-Layer Dielectrics
审中-公开
用于提高层间电介质中金属模式密度的器件制造方案
- 专利标题: Device-Manufacturing Scheme for Increasing the Density of Metal Patterns in Inter-Layer Dielectrics
- 专利标题(中): 用于提高层间电介质中金属模式密度的器件制造方案
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申请号: US14059123申请日: 2013-10-21
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公开(公告)号: US20140042557A1公开(公告)日: 2014-02-13
- 发明人: Wei Yu Ma , Fang-Tsun Chu , Kvei-Feng Yen , Yao-Bin Wang
- 申请人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 申请人地址: TW Hsin-Chu
- 专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- 当前专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- 当前专利权人地址: TW Hsin-Chu
- 主分类号: H01L23/528
- IPC分类号: H01L23/528 ; H01L27/06
摘要:
A method includes forming a transistor at a surface of a semiconductor substrate, wherein the step of forming the transistor comprises forming a gate electrode, and forming a source/drain region adjacent the gate electrode. First metal features are formed to include at least portions at a same level as the gate electrode. Second metal features are formed simultaneously, and are over and contacting the first metal features. A first one of the second metal features is removed and replaced with a third metal feature, wherein a second one of the second metal features is not removed. A fourth metal feature is formed directly over and contacting the gate electrode, wherein the third and the fourth metal features are formed using a same metal-filling process.
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