发明申请
- 专利标题: Memory with Segmented Error Correction Codes
- 专利标题(中): 具有分段纠错码的存储器
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申请号: US13602116申请日: 2012-09-01
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公开(公告)号: US20140068391A1公开(公告)日: 2014-03-06
- 发明人: Manish Goel , Dongsuk Jeon
- 申请人: Manish Goel , Dongsuk Jeon
- 主分类号: H03M13/00
- IPC分类号: H03M13/00
摘要:
A code word is received that was derived from a plurality of smaller code words that represent a data word of 2m data bits and a plurality of error correction code bits. The code word is converted into the plurality of smaller code words and syndromes are computed by multiplying each of the plurality of smaller code words by a check matrix. The syndrome words are processed to determine a number of errors that exist in each of the plurality of smaller code words. A portion of the syndrome words is processed to determine locations of possible errors within the plurality of smaller code words. Up to two errors may be corrected and up to three errors may be detected in the code word by using the number of errors and the locations of possible errors to determine erroneous bits in the code word.
公开/授权文献
- US08745472B2 Memory with segmented error correction codes 公开/授权日:2014-06-03
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