A solid-state imaging device includes a pixel array, control lines TG each provided for a corresponding one of rows of pixels and configured to control, e.g., operation of a transfer transistor, and a driver circuit 103 configured to control the operation of the transfer transistor through the control lines TG and connected to a power-supply line TGL. The solid-state imaging device performs all reset operation for resetting signal charges of all pixels by the driver circuit 103 and reading operation for reading a pixel signal from each row of the pixels. An impedance controller 130 configured to control an impedance value for power-supply line TGL in the reading operation to be less than an impedance value for power-supply line TGL in the all reset operation is provided.