发明申请
- 专利标题: ON-DIE ALL-DIGITAL DELAY MEASUREMENT CIRCUIT
- 专利标题(中): 全数字数字延时测量电路
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申请号: US13997604申请日: 2012-03-30
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公开(公告)号: US20140203798A1公开(公告)日: 2014-07-24
- 发明人: Frank O'Mahony , Bryan K. Casper , Mozhgan Mansuri
- 申请人: Frank O'Mahony , Bryan K. Casper , Mozhgan Mansuri
- 国际申请: PCT/US12/31408 WO 20120330
- 主分类号: G01R31/317
- IPC分类号: G01R31/317
摘要:
An all-digital delay measurement circuit (DMC) constructed on an integrated circuit (IC) die characterizes clocking circuits such as full phase rotation interpolators, also constructed on the IC die. The on-die all-digital DMC produces a digital output value proportional to the relative delay between two clocks, normalized to the clock period of the two clocks.
公开/授权文献
- US09116204B2 On-die all-digital delay measurement circuit 公开/授权日:2015-08-25