发明申请
US20140281401A1 Systems, Apparatuses, and Methods for Determining a Trailing Least Significant Masking Bit of a Writemask Register
有权
用于确定写掩码寄存器的尾随最低有效屏蔽位的系统，设备和方法
- 专利标题： Systems, Apparatuses, and Methods for Determining a Trailing Least Significant Masking Bit of a Writemask Register
- 专利标题（中）： 用于确定写掩码寄存器的尾随最低有效屏蔽位的系统，设备和方法
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申请号： US13840809申请日： 2013-03-15
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公开(公告)号： US20140281401A1公开(公告)日： 2014-09-18
- 发明人: Christopher J. Hughes , Mark J. Charney , Jesus Corbal , Milind B. Girkar , Elmoustapha Ould-Ahmed_Vall , Bret L. Toll , Robert Valentine
- 申请人： Christopher J. Hughes , Mark J. Charney , Jesus Corbal , Milind B. Girkar , Elmoustapha Ould-Ahmed_Vall , Bret L. Toll , Robert Valentine
- 主分类号： G06F9/30
- IPC分类号： G06F9/30
摘要：
The execution of a KZBTZ finds a trailing least significant zero bit position in an first input mask and sets an output mask to have the values of the first input mask, but with all bit positions closer to the most significant bit position than the trailing least significant zero bit position in an first input mask set to zero. In some embodiments, a second input mask is used as a writemask such that bit positions of the first input mask are not considered in the trailing least significant zero bit position calculation depending upon a corresponding bit position in the second input mask.
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