发明申请
US20140292705A1 METHOD & CIRCUIT FOR PARASITIC CAPACITANCE CANCELLATION FOR SELF CAPACITANCE SENSING
有权
用于自适应感测的PARASIIC电容消除的方法和电路
- 专利标题: METHOD & CIRCUIT FOR PARASITIC CAPACITANCE CANCELLATION FOR SELF CAPACITANCE SENSING
- 专利标题(中): 用于自适应感测的PARASIIC电容消除的方法和电路
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申请号: US13853887申请日: 2013-03-29
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公开(公告)号: US20140292705A1公开(公告)日: 2014-10-02
- 发明人: Sze-Kwang Tan , Yannick Guedon
- 申请人: STMICROELECTRONICS ASIA PACIFIC PTE. LTD.
- 申请人地址: SG Singapore
- 专利权人: STMicroelectronics Asia Pacific Pte. Ltd.
- 当前专利权人: STMicroelectronics Asia Pacific Pte. Ltd.
- 当前专利权人地址: SG Singapore
- 主分类号: G06F3/044
- IPC分类号: G06F3/044
摘要:
Apparatus and methods to measure capacitance changes for a touch-sensitive capacitive matrix are described. Charge-removal circuits and measurement techniques may be employed to cancel deleterious effects of parasitic capacitances in the touch-sensitive capacitive matrix. Capacitively switching a supply during timed charge removal may be used to cancel unwanted effects due to clock jitter. The apparatus and methods can improve signal-to-noise characteristics, sensitivity, and/or dynamic range for capacitive measurements relating to touch-sensitive capacitive devices.
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