Invention Application
- Patent Title: METHOD OF FORMING ISOLATING STRUCTURE AND THROUGH SILICON VIA
- Patent Title (中): 通过硅形成隔离结构的方法
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Application No.: US13907996Application Date: 2013-06-03
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Publication No.: US20140357050A1Publication Date: 2014-12-04
- Inventor: JI FENG , XIAOQING XU , Hailong Gu , Ying-Tu Chen , JINGLING WANG
- Applicant: UNITED MICROELECTRONICS CORP.
- Main IPC: H01L21/762
- IPC: H01L21/762 ; H01L21/768

Abstract:
A method of forming an isolation structure and a through silicon via includes the following steps. First, at least a first trench and at least a second trench are formed in the substrate by a single etch step. Then, an insulating layer is formed to simultaneously fill up the first trench and cover a sidewall and a bottom of the second trench. After that, a conductive layer is formed to fill in the second trench. Subsequently, the insulating layer and the conductive layer on a front side of the substrate are removed. Later, a back side of the substrate is thinned to expose the conductive layer in the second trench. The insulating layer in the first trench serves as an insulating filling, and the insulating layer on the sidewall of the second trench serves as a liner of the through silicon via.
Information query
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