Invention Application
- Patent Title: STACK TYPE SEMICONDUCTOR PACKAGE
- Patent Title (中): 堆叠型半导体封装
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Application No.: US14267259Application Date: 2014-05-01
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Publication No.: US20140374902A1Publication Date: 2014-12-25
- Inventor: Jang-Woo LEE , Jong-Bo SHIM , Kyoung-sei CHOI
- Applicant: Jang-Woo LEE , Jong-Bo SHIM , Kyoung-sei CHOI
- Priority: KR10-2013-0070474 20130619
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/36

Abstract:
A stack type semiconductor package includes: a lower semiconductor package including a lower package substrate, and a lower semiconductor chip which is mounted on the lower package substrate and includes a first surface facing a top surface of the lower package substrate and a second surface opposite to the first surface; an upper semiconductor package including an upper package substrate and an upper semiconductor chip which is mounted on the upper package substrate; an inter-package connection unit which connects the lower package substrate and the upper package substrate; a heat dissipation member which is formed on the second surface of the lower semiconductor chip; and an interconnection unit which is formed on a bottom surface of the upper package substrate, and is adhered to the heat dissipation member to connect the lower semiconductor chip and the upper package substrate.
Public/Granted literature
- US09230876B2 Stack type semiconductor package Public/Granted day:2016-01-05
Information query
IPC分类: