Systems and methods for a self-checking pair are provided. In certain embodiments a system on chip in a self-checking pair includes a system architecture; a plurality of communication channels configured for communicating data with an external system; and an integrated system on chip logic configured to collect the data communicated through the plurality of communication channels and transmit the data to a second system on chip and handle received data from the second system on chip, wherein the integrated system on chip logic determines whether the data communicated through the plurality of communication channels matches the received data from the second system on chip.