A wiring substrate includes an insulating layer, a first pad, and a solder resist layer. The first pad is embedded in the insulating layer. The solder resist layer is provided on an upper surface of the insulating layer. The solder resist layer is formed with an opening portion through which the recess portion is exposed. An adjacent portion of the solder resist layer adjacent to a peripheral portion of the opening portion covers a peripheral portion of the upper surface of the first pad and protrudes from the peripheral portion of the upper surface of the first pad toward the center portion of the first pad so as to cover above the recess portion. Surfaces of the first pad being in contact with the insulating layer are smaller in roughness than the upper surface of the insulating layer and the peripheral portion of the upper surface of the first pad.