发明申请
- 专利标题： OPTIMIZATION OF INSTRUCTIONS TO REDUCE MEMORY ACCESS VIOLATIONS
- 专利标题（中）： 优化指令以减少内存访问违规
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申请号： US14040077申请日： 2013-09-27
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公开(公告)号： US20150095625A1公开(公告)日： 2015-04-02
- 发明人: Wessam M. Hassanein , Abhay S. Kanhere , Paul Caprioli
- 申请人： Wessam M. Hassanein , Abhay S. Kanhere , Paul Caprioli
- 主分类号： G06F9/30
- IPC分类号： G06F9/30
摘要：
Mechanisms for reducing memory access violations are disclosed. Sets of instructions may be identified and the identified sets of instructions may be re-translated or optimized to generate other sets of instructions. Execution of the other sets of instructions is analyzed to determine whether additional memory access violations occur. When additional memory access violations occur, further sets of instructions may be generated or re-translation/optimization of instructions may be disabled.