Invention Application
- Patent Title: SEMICONDUCTOR DEVICE INCLUDING VERTICALLY SPACED SEMICONDUCTOR CHANNEL STRUCTURES AND RELATED METHODS
- Patent Title (中): 包括垂直间隔半导体通道结构和相关方法的半导体器件
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Application No.: US14060874Application Date: 2013-10-23
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Publication No.: US20150108573A1Publication Date: 2015-04-23
- Inventor: Qing Liu , Xiuyu Cai , Ruilong Xie
- Applicant: GLOBALFOUNDRIES INC. , STMicroelectronics, Inc.
- Applicant Address: KY Grand Cayman US TX Coppell
- Assignee: GLOBALFOUNDRIES INC.,STMicroelectronics, Inc.
- Current Assignee: GLOBALFOUNDRIES INC.,STMicroelectronics, Inc.
- Current Assignee Address: KY Grand Cayman US TX Coppell
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L27/088

Abstract:
A method for making a semiconductor device may include forming, on a substrate, at least one stack of alternating first and second semiconductor layers. The first semiconductor layer may comprise a first semiconductor material and the second semiconductor layer may comprise a second semiconductor material. The first semiconductor material may be selectively etchable with respect to the second semiconductor material. The method may further include removing portions of the at least one stack and substrate to define exposed sidewalls thereof, forming respective spacers on the exposed sidewalls, etching recesses through the at least one stack and substrate to define a plurality of spaced apart pillars, selectively etching the first semiconductor material from the plurality of pillars leaving second semiconductor material structures supported at opposing ends by respective spacers, and forming at least one gate adjacent the second semiconductor material structures.
Public/Granted literature
- US09263338B2 Semiconductor device including vertically spaced semiconductor channel structures and related methods Public/Granted day:2016-02-16
Information query
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