Invention Application
- Patent Title: METHOD OF FORMING PACKAGE STRUCTURE
- Patent Title (中): 形成包装结构的方法
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Application No.: US14591551Application Date: 2015-01-07
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Publication No.: US20150125995A1Publication Date: 2015-05-07
- Inventor: Chia-Yen LEE , Hsin-Chang TSAI , Peng-Hsin LEE
- Applicant: Delta Electronics, Inc.
- Main IPC: H01L25/00
- IPC: H01L25/00 ; H01L21/768 ; H01L25/065

Abstract:
A package structure including: a first semiconductor device including a first semiconductor substrate and a first electronic device, the first semiconductor device having a first side and a second side, wherein at least part of the first electronic device being adjacent to the first side, and the first semiconductor device has a via-hole formed through the first semiconductor device, wherein the via-hole has a first opening adjacent to the first side; an interconnection structure disposed in the first semiconductor device, wherein the interconnection structure includes: a via structure disposed in the via-hole without exceeding the first opening; a first pad disposed on the first side of the first semiconductor device and covering the via-hole; and a second semiconductor device vertically integrated with the first semiconductor device.
Public/Granted literature
- US09275982B2 Method of forming interconnection structure of package structure Public/Granted day:2016-03-01
Information query
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