- 专利标题: SELF-ALIGNED DUAL-HEIGHT ISOLATION FOR BULK FINFET
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申请号: US14083571申请日: 2013-11-19
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公开(公告)号: US20150137308A1公开(公告)日: 2015-05-21
- 发明人: Murat Kerem Akarvardar , Steven John Bentley , Kangguo Cheng , Bruce B. Doris , Jody Fronheiser , Ajey Poovannummoottil Jacob , Ali Khakifirooz , Toshiharu Nagumo
- 申请人: International Business Machines Corporation , Renesas Electronics Corporation , GLOBALFOUNDRIES Inc.
- 申请人地址: US NY Armonk JP Tokyo KY Grand Cayman
- 专利权人: International Business Machines Corporation,Renesas Electronics Corporation,GLOBALFOUNDRIES Inc.
- 当前专利权人: International Business Machines Corporation,Renesas Electronics Corporation,GLOBALFOUNDRIES Inc.
- 当前专利权人地址: US NY Armonk JP Tokyo KY Grand Cayman
- 主分类号: H01L27/088
- IPC分类号: H01L27/088 ; H01L29/06 ; H01L21/8234 ; H01L21/762
摘要:
A method of forming a semiconductor structure includes forming a first isolation region between fins of a first group of fins and between fins of a second group of fins. The first a second group of fins are formed in a bulk semiconductor substrate. A second isolation region is formed between the first group of fins and the second group of fins, the second isolation region extends through a portion of the first isolation region such that the first and second isolation regions are in direct contact and a height above the bulk semiconductor substrate of the second isolation region is greater than a height above the bulk semiconductor substrate of the first isolation region.
公开/授权文献
- US09324790B2 Self-aligned dual-height isolation for bulk FinFET 公开/授权日:2016-04-26
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