Invention Application
- Patent Title: METHODS FOR FORMING INTERCONNECTION STRUCTURES IN AN INTEGRATED CLUSTER SYSTEM FOR SEMICONDCUTOR APPLICATIONS
- Patent Title (中): 用于形成用于半导体应用的集成集群系统中的互连结构的方法
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Application No.: US14276879Application Date: 2014-05-13
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Publication No.: US20150262869A1Publication Date: 2015-09-17
- Inventor: Mehul B. NAIK , Srinivas D. NEMANI , Takehito KOSHIZAWA , He REN
- Applicant: APPLIED MATERIALS, INC.
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L21/02 ; H01L21/3213

Abstract:
Embodiments of the present invention provide methods for forming an interconnection structure in semiconductor devices without breaking vacuum with minimum oxidation/atmosphere exposure. In one embodiment, a method for forming an interconnection structure for semiconductor devices includes supplying a barrier layer etching gas mixture into a first processing chamber having a substrate disposed therein to etch portions of a barrier layer exposed by a patterned metal layer until the underlying substrate is exposed, the first processing chamber disposed in a processing system, and forming a liner layer on the substrate covering the etched barrier layer in a second processing chamber disposed in the processing system.
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