发明申请
US20150277914A1 LOCK ELISION WITH BINARY TRANSLATION BASED PROCESSORS 审中-公开
基于二进制翻译的处理器的锁定

LOCK ELISION WITH BINARY TRANSLATION BASED PROCESSORS
摘要:
Generally, this disclosure provides systems, devices, methods and computer readable media for detection and exploitation of lock elision opportunities with binary translation based processors. The device may include a dynamic binary translation (DBT) module to translate a region of code from a first instruction set architecture (ISA) to translated code in a second ISA and to detect and elide a lock associated with a critical section of the region of code. The device may also include a processor to speculatively execute the translated code in the critical section. The device may further include a transactional support processor to detect a memory access conflict associated with the lock and/or critical section during the speculative execution, roll back the speculative execution in response to the detection, and commit the speculative execution in the absence of the detection.
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