发明申请
US20150331983A1 METHOD FOR AUTOMATICALLY GENERATING A NETLIST OF AN FPGA PROGRAM
有权
用于自动生成FPGA程序的列表的方法
- 专利标题: METHOD FOR AUTOMATICALLY GENERATING A NETLIST OF AN FPGA PROGRAM
- 专利标题(中): 用于自动生成FPGA程序的列表的方法
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申请号: US14711116申请日: 2015-05-13
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公开(公告)号: US20150331983A1公开(公告)日: 2015-11-19
- 发明人: Heiko KALTE , Dominik LUBELEY
- 申请人: dSPACE digital signal processing and control engineering GmbH
- 申请人地址: DE Paderborn
- 专利权人: dSPACE digital signal processing and control engineering GmbH
- 当前专利权人: dSPACE digital signal processing and control engineering GmbH
- 当前专利权人地址: DE Paderborn
- 优先权: EP14168015.7 20140513; EP15165320.1 20150428
- 主分类号: G06F17/50
- IPC分类号: G06F17/50
摘要:
A method for generating a netlist of an FPGA program. The model of the FPGA program is composed of at least two components, each component being assigned a separate partition on the FPGA. An independent build is carried out for each component and an overall classification is generated from the components, wherein the build jobs are automatically started after a trigger event and the trigger event is a saving of a component, the exiting of a component of the design, or a time-controlled, automated initiation of a build.
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