Invention Application
- Patent Title: METHODS OF FORMING SEMICONDUCTOR DEVICE ASSEMBLIES AND INTERCONNECT STRUCTURES, AND RELATED SEMICONDUCTOR DEVICE ASSEMBLIES AND INTERCONNECT STRUCTURES
- Patent Title (中): 形成半导体器件组件和互连结构的方法以及相关半导体器件组件和互连结构
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Application No.: US14282606Application Date: 2014-05-20
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Publication No.: US20150340328A1Publication Date: 2015-11-26
- Inventor: Jaspreet S. Gandhi
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee Address: US ID Boise
- Main IPC: H01L23/00
- IPC: H01L23/00

Abstract:
A method of forming a semiconductor device assembly comprises forming on a first substrate, at least one bond pad comprising a first nickel material over the first substrate, a first copper material on the first nickel material, and a solder-wetting material on the first copper material. On a second substrate is formed at least one conductive pillar comprising a second nickel material, a second copper material directly contacting the second nickel material, and a solder material directly contacting the second copper material. The solder-wetting material is contacted with the solder material. The first copper material, the solder-wetting material, the second copper material, and the solder material are converted into a substantially homogeneous intermetallic compound interconnect structure. Additional methods, semiconductor device assemblies, and interconnect structures are also described.
Public/Granted literature
Information query
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