Invention Application
- Patent Title: Method of Producing a III-V Fin Structure
- Patent Title (中): 生产III-V鳍结构的方法
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Application No.: US14719995Application Date: 2015-05-22
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Publication No.: US20150340503A1Publication Date: 2015-11-26
- Inventor: Hideki Minari , Shinichi Yoshida , Geoffrey Pourtois , Matty Caymax , Eddy Simoen
- Applicant: IMEC VZW , Sony Corporation
- Applicant Address: JP Tokyo BE Leuven
- Assignee: SONY CORPORATION,IMEC VZW
- Current Assignee: SONY CORPORATION,IMEC VZW
- Current Assignee Address: JP Tokyo BE Leuven
- Priority: EP14169499.2 20140522
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/06 ; H01L29/66 ; H01L21/3213 ; H01L21/285 ; H01L21/762 ; H01L21/3205 ; H01L29/20 ; H01L21/02

Abstract:
A method of producing a III-V fin structure within a gap separating shallow trench isolation (STI) structures and exposing a semiconductor substrate is disclosed, the method comprising providing a semiconductor substrate, providing in the semiconductor substrate at least two identical STI structures separated by a gap exposing the semiconductor substrate, wherein said gap is bounded by said at least two identical STI structures, and, producing a III-V fin structure within said gap on the exposed semiconductor substrate, and providing a diffusion barrier at least in contact with each side wall of said at least two identical STI structures and with side walls of said III-V fin structure and wherein said semiconductor substrate is a Si substrate.
Public/Granted literature
- US09431519B2 Method of producing a III-V fin structure Public/Granted day:2016-08-30
Information query
IPC分类: