Invention Application
US20150340994A1 RECEIVER ARCHITECTURE FOR A COMPACT AND LOW POWER RECEIVER 有权
用于紧凑型和低功率接收器的接收器架构

RECEIVER ARCHITECTURE FOR A COMPACT AND LOW POWER RECEIVER
Abstract:
A circuit for a receiver with reconfigurable low-power or wideband operation may comprise one or more main signal paths each coupled to a first port and including a low-noise amplifier (LNA) configured to provide a radio frequency (RF) signal to a main mixer circuit. An auxiliary signal path may be coupled to a second port. The auxiliary signal path may include an auxiliary mixer configured to provide an on-chip matching input impedance that may match an impedance of the antenna. The first port may be coupled to an RF antenna through an off-chip matching circuit, when a low-power operation is desired. The first port may be coupled to the second port and to the RF antenna, when a wideband operation is desired.
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