Invention Application
US20150364394A1 Method for Building Up a Fan-Out RDL Structure with Fine Pitch Line-Width and Line-Spacing 有权
建立具有细间距线宽和线间距的扇出式RDL结构的方法

  • Patent Title: Method for Building Up a Fan-Out RDL Structure with Fine Pitch Line-Width and Line-Spacing
  • Patent Title (中): 建立具有细间距线宽和线间距的扇出式RDL结构的方法
  • Application No.: US14305640
    Application Date: 2014-06-16
  • Publication No.: US20150364394A1
    Publication Date: 2015-12-17
  • Inventor: Yaojian Lin
  • Applicant: STATS ChipPAC, Ltd.
  • Main IPC: H01L23/31
  • IPC: H01L23/31 H01L21/56 H01L23/00 H01L23/48
Method for Building Up a Fan-Out RDL Structure with Fine Pitch Line-Width and Line-Spacing
Abstract:
A semiconductor device has a semiconductor die and an encapsulant deposited over the semiconductor die. A first insulating layer is formed over a first surface of the encapsulant and an active surface of the semiconductor die. A second insulating layer is formed over a second surface of the encapsulant opposite the first surface. A conductive layer is formed over the first insulating layer. The conductive layer includes a line-pitch or line-spacing of less than 5 μm. The active surface of the semiconductor die is recessed within the encapsulant. A third insulating layer is formed over the semiconductor die including a surface of the third insulating layer coplanar with a surface of the encapsulant. The second insulating layer is formed prior to forming the conductive layer. A trench is formed in the first insulating layer. The conductive layer is formed within the trench.
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