Invention Application
US20150364480A1 Reducing Retention Loss in Analog Floating Gate Memory 审中-公开
减少模拟浮动存储器中的保留损耗

Reducing Retention Loss in Analog Floating Gate Memory
Abstract:
A conditioning process for integrated circuits including floating-gate devices, such as floating-gate capacitors or transistors in analog or other circuits in which the devices are to be programmed to a specific level. Following initial programming of the floating-gate devices to a specific programmed level, the integrated circuits are subjected to a conditioning bake, followed by re-trim back to the initial programmed level. That portion of the charge at the floating-gate device that was weakly held is removed by the conditioning bake, while the re-trim replaces that charge with more strongly held (i.e., higher activation energy) programmed charge.
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