Invention Application
US20150370710A1 OPTIONAL ACKNOWLEDGEMENT FOR OUT-OF-ORDER COHERENCE TRANSACTION COMPLETION
审中-公开
用于不及格相关交易完成的可选确认
- Patent Title: OPTIONAL ACKNOWLEDGEMENT FOR OUT-OF-ORDER COHERENCE TRANSACTION COMPLETION
- Patent Title (中): 用于不及格相关交易完成的可选确认
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Application No.: US14841956Application Date: 2015-09-01
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Publication No.: US20150370710A1Publication Date: 2015-12-24
- Inventor: Daniel B. Wu , Matthew D. Pierson , Kai Chirca , Timothy D. Anderson
- Applicant: Texas Instruments Incorporated
- Main IPC: G06F12/08
- IPC: G06F12/08

Abstract:
To enable efficient tracking of transactions, an acknowledgement expected signal is used to give the cache coherent interconnect a hint for whether a transaction requires coherent ownership tracking. This signal informs the cache coherent interconnect to expect an ownership transfer acknowledgement signal from the initiating master upon read/write transfer completion. The cache coherent interconnect can therefore continue tracking the transaction at its point of coherency until it receives the acknowledgement from the initiating master only when necessary.
Public/Granted literature
- US09372799B2 Coherent cache system with optional acknowledgement for out-of-order coherence transaction completion Public/Granted day:2016-06-21
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