A nonvolatile memory device includes a mat including a plurality of memory blocks, an address decoder configured to select one of the memory blocks in response to an address, an input/output circuit including first and second page buffers configured to program a plurality of data pages into a single physical page of the selected one of the memory blocks or store the plurality of data pages read from the single physical page of the selected one of the memory blocks, and a control logic configured to perform a dumping operation at an other one of the first page buffers and second page buffers when a data input operation or a data output operation is performed at one of the first and second page buffers of the input/output circuit. The input/output circuit includes a plurality of page buffers. The plurality of page buffers include the first and second page buffers.