发明申请
- 专利标题： SELECTIVE DIE ELECTRICAL INSULATION BY ADDITIVE PROCESS
- 专利标题（中）： 通过添加工艺选择性电绝缘
-
申请号： US14868090申请日： 2015-09-28
-
公开(公告)号： US20160020188A1公开(公告)日： 2016-01-21
- 发明人: Jeffrey S. Leal
- 申请人： Invensas Corporation
- 申请人地址： US CA San Jose
- 专利权人： INVENSAS CORPORATION
- 当前专利权人： INVENSAS CORPORATION
- 当前专利权人地址： US CA San Jose
- 主分类号： H01L23/00
- IPC分类号： H01L23/00 ; H01L21/324 ; H01L21/31 ; H01L21/768 ; H01L25/00
摘要：
Additive processes are employed for electrically insulating selected surface regions on a stack of die; and methods for electrically interconnecting die in a stack of die, include additive processes for electrically insulating selected surface regions of the die. Regions that are not insulated according to the invention are available for electrical connection using electrically conductive material applied in flowable form to make electrically conductive traces.
公开/授权文献
- US09490230B2 Selective die electrical insulation by additive process 公开/授权日：2016-11-08