发明申请
US20160027694A1 WAFER LEVEL FLAT NO-LEAD SEMICONDUCTOR PACKAGES AND METHODS OF MANUFACTURE
有权
WAFER LEVEL平面无铅半导体封装及其制造方法
- 专利标题: WAFER LEVEL FLAT NO-LEAD SEMICONDUCTOR PACKAGES AND METHODS OF MANUFACTURE
- 专利标题(中): WAFER LEVEL平面无铅半导体封装及其制造方法
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申请号: US14341454申请日: 2014-07-25
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公开(公告)号: US20160027694A1公开(公告)日: 2016-01-28
- 发明人: Darrel Truhitte , James P. Letterman, JR.
- 申请人: Semiconductor Components Industries, LLC
- 主分类号: H01L21/78
- IPC分类号: H01L21/78 ; H01L23/00 ; H01L21/683 ; H01L21/56
摘要:
Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.
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