A apparatus including a clock source and a comparison circuit is presented. The clock source may be configured to generate a clock signal. The comparison circuit may be configured select a first frequency of the clock signal and to receive a plurality of voltage signal inputs for comparison. The comparison circuit may be further configured to compare a voltage level of a first voltage signal input of the plurality of voltage signal inputs to a voltage level of a second voltage signal input of the plurality of voltage signal inputs responsive to an active edge of the clock signal. The comparison circuit may also be configured to determine a comparison value corresponding to the comparison of the voltage levels and to select a second frequency of the clock signal dependent upon the comparison value, in which the second frequency is different than the first frequency.