Invention Application
US20160056101A1 CHIP-STACKED SEMICONDUCTOR PACKAGE 有权
芯片堆叠半导体封装

CHIP-STACKED SEMICONDUCTOR PACKAGE
Abstract:
A chip-stacked semiconductor package including a first chip having a plurality of first real bump pads and a plurality of first dummy bump pads, a second chip on the first chip, the second chip including a plurality of real bumps and a plurality of bridge dummy bumps, the plurality of real bumps electrically connected to the plurality of first real bump pads, the plurality of bridge dummy bumps connected to the plurality of first dummy bump pads, and a sealing member sealing the first chip and the second chip may be provided.
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