Invention Application
US20160056136A1 ELECTRICAL INTERCONNECT STRUCTURE FOR AN EMBEDDED SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THEREOF 有权
嵌入式半导体器件封装的电气互连结构及其制造方法

ELECTRICAL INTERCONNECT STRUCTURE FOR AN EMBEDDED SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THEREOF
Abstract:
An electronics package includes a first dielectric substrate having a first plurality of vias formed through a thickness thereof, a metalized contact layer coupled to a top surface of the first dielectric substrate, and a first die positioned within a first die opening formed through the thickness of the first dielectric substrate. Metalized interconnects are formed on a bottom surface of the first dielectric substrate and extend through the first plurality of vias to contact the metalized contact layer. A second dielectric substrate is coupled to the first dielectric substrate and has a second plurality of vias formed through a thickness thereof. Metalized interconnects extend through the second plurality of vias to contact the first plurality of metalized interconnects and contact pads of the first die. A first conductive element electrically couples the first die to the metalized contact layer.
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