Invention Application
US20160056253A1 INTEGRATED CIRCUITS WITH DIFFUSION BARRIER LAYERS AND PROCESSES FOR PREPARING INTEGRATED CIRCUITS INCLUDING DIFFUSION BARRIER LAYERS 有权
具有扩散障碍层的集成电路和用于制备集成电路的方法,包括扩散障碍层

  • Patent Title: INTEGRATED CIRCUITS WITH DIFFUSION BARRIER LAYERS AND PROCESSES FOR PREPARING INTEGRATED CIRCUITS INCLUDING DIFFUSION BARRIER LAYERS
  • Patent Title (中): 具有扩散障碍层的集成电路和用于制备集成电路的方法,包括扩散障碍层
  • Application No.: US14467357
    Application Date: 2014-08-25
  • Publication No.: US20160056253A1
    Publication Date: 2016-02-25
  • Inventor: Rohit GalatageHoon Kim
  • Applicant: GLOBALFOUNDRIES, Inc.
  • Main IPC: H01L29/423
  • IPC: H01L29/423 H01L29/78 H01L21/283
INTEGRATED CIRCUITS WITH DIFFUSION BARRIER LAYERS AND PROCESSES FOR PREPARING INTEGRATED CIRCUITS INCLUDING DIFFUSION BARRIER LAYERS
Abstract:
Integrated circuits with a diffusion barrier layers, and processes for preparing integrated circuits including diffusion barrier layers are provided herein. An exemplary integrated circuit includes a semiconductor substrate comprising a semiconductor material, a compound gate dielectric overlying the semiconductor substrate, and a gate electrode overlying the compound gate dielectric. In this embodiment, the compound gate dielectric includes a first dielectric layer, a diffusion barrier layer overlying the first dielectric layer; and a second dielectric layer overlying the diffusion barrier layer; wherein the diffusion barrier layer is made of a material that is less susceptible to diffusion of the semiconductor material than the first dielectric layer, less susceptible to diffusion of oxygen than the second dielectric layer, or both.
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