Invention Application
- Patent Title: SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
- Patent Title (中): 半导体封装及其制造方法
-
Application No.: US14722742Application Date: 2015-05-27
-
Publication No.: US20160086898A1Publication Date: 2016-03-24
- Inventor: Jin-wook Jang , Se-jin Yoo , Sung-il Cho , Jae-ho Choi
- Applicant: Jin-wook Jang , Se-jin Yoo , Sung-il Cho , Jae-ho Choi
- Priority: KR10-2014-0126053 20140922
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L25/065 ; H01L23/48 ; H01L23/498 ; H01L23/31
Abstract:
A semiconductor package includes a wiring substrate including a plurality of solder pads; a chip including a plurality of chip pads connected to the solder pads through a plurality of solders; a sealing layer configured to seal the chip and the solders, at least one void being between the solders; and a solder extrusion prevention layer on one sidewall of the solder exposed by the at least one void.
Public/Granted literature
- US09412712B2 Semiconductor package and method of manufacturing the same Public/Granted day:2016-08-09
Information query
IPC分类:
