Invention Application
US20160086912A1 METHODS FOR SEMICONDUCTOR PACKAGE 审中-公开
半导体封装方法

METHODS FOR SEMICONDUCTOR PACKAGE
Abstract:
A method for manufacturing a semiconductor package includes providing a first semiconductor chip having a first surface and a second surface opposing each other, the first semiconductor chip including through-electrodes extending between the first surface and the second surface, forming an adhesive layer on the first surface, providing the first semiconductor chip on a package substrate so that the adhesive layer contacts the package substrate, thermo-compressing the first semiconductor chip so that the adhesive layer protrudes from between the first semiconductor chip and the package substrate towards the outside of the first semiconductor chip to form a support part that covers sides of the first semiconductor chip, and providing a second semiconductor chip on the first semiconductor chip, the second semiconductor chip having a third surface and a fourth surface opposing each other, the second semiconductor chip including connection terminals formed on the third surface.
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