Invention Application
- Patent Title: METHOD FOR RELAXING THE TRANSVERSE MECHANICAL STRESSES WITHIN THE ACTIVE REGION OF A MOS TRANSISTOR, AND CORRESPONDING INTEGRATED CIRCUIT
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Application No.: US14965990Application Date: 2015-12-11
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Publication No.: US20160099183A1Publication Date: 2016-04-07
- Inventor: Denis Rideau , Elise Baylac , Emmanuel Richard , Francois Andrieu
- Applicant: STMicroelectronics (Crolles 2) SAS , STMicroelectronics SA , Commissariat A L'Energie Atomique et aux Energies Alternatives
- Applicant Address: FR Crolles FR Montrouge FR Paris
- Assignee: STMicroelectronics (Crolles 2) SAS,STMicroelectronics SA,Commissariat A L'Energie Atomique et aux Energies Alternatives
- Current Assignee: STMicroelectronics (Crolles 2) SAS,STMicroelectronics SA,Commissariat A L'Energie Atomique et aux Energies Alternatives
- Current Assignee Address: FR Crolles FR Montrouge FR Paris
- Priority: FR1359703 20131007
- Main IPC: H01L21/84
- IPC: H01L21/84 ; H01L21/8234 ; H01L21/762 ; H01L29/10
Abstract:
The transverse mechanical stress within the active region of a MOS transistor is relaxed by forming an insulating incursion, such as an insulated trench, within the active region of the MOS transistor. The insulated incursion is provided at least in a channel region of the MOS transistor so as to separate the channel region into two parts. The insulated incursion is configured to extend in a direction of a length of the MOS transistor. The insulated incursion may further extend into one or more of a source region or drain region located adjacent the channel region of the MOS transistor.
Information query
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