Invention Application
- Patent Title: SEMICONDUCTOR PACKAGE AND METHOD OF FORMING THE SAME
-
Application No.: US15010826Application Date: 2016-01-29
-
Publication No.: US20160148913A1Publication Date: 2016-05-26
- Inventor: Tae-Joo HWANG , Tae-Gyeong CHUNG , Eun-Chul AHN
- Applicant: Tae-Joo HWANG , Tae-Gyeong CHUNG , Eun-Chul AHN
- Priority: KR10-2007-0044643 20070508
- Main IPC: H01L25/10
- IPC: H01L25/10

Abstract:
A semiconductor package includes a first package substrate, a first semiconductor chip disposed on the first package substrate, the semiconductor chip including first through hole vias, and a chip package disposed on the first semiconductor chip, the chip package including a second package substrate and a second semiconductor chip disposed on the second package substrate, wherein a first conductive terminal is disposed on a first surface of the semiconductor chip and a second conductive terminal is disposed on a first surface of the second package substrate, the first conductive terminal disposed on the second conductive terminal.
Public/Granted literature
- US09685400B2 Semiconductor package and method of forming the same Public/Granted day:2017-06-20
Information query
IPC分类: