Invention Application
- Patent Title: FACET-FREE STRAINED SILICON TRANSISTOR
- Patent Title (中): 无菌无菌应变硅晶体管
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Application No.: US14983070Application Date: 2015-12-29
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Publication No.: US20160149038A1Publication Date: 2016-05-26
- Inventor: Nicolas Loubet , Prasanna Khare , Qing Liu
- Applicant: STMicroelectronics, Inc.
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/165 ; H01L29/161 ; H01L29/16 ; H01L21/8238 ; H01L29/66

Abstract:
The presence of a facet or a void in an epitaxially grown crystal indicates that crystal growth has been interrupted by defects or by certain material boundaries. Faceting can be suppressed during epitaxial growth of silicon compounds that form source and drain regions of strained silicon transistors. It has been observed that faceting can occur when epitaxial layers of certain silicon compounds are grown adjacent to an oxide boundary, but faceting does not occur when the epitaxial layer is grown adjacent to a silicon boundary or adjacent to a nitride boundary. Because epitaxial growth of silicon compounds is often necessary in the vicinity of isolation trenches that are filled with oxide, techniques for suppression of faceting in these areas are of particular interest. One such technique, presented herein, is to line the isolation trenches with SiN to provide a barrier between the oxide and the region in which epitaxial growth is intended.
Public/Granted literature
- US10134899B2 Facet-free strained silicon transistor Public/Granted day:2018-11-20
Information query
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