An anti-tampering system and method typically featuring a printed circuit board with anti-tamper protection circuitry powered by a power source. Switching circuitry is coupled between the power source and the anti-tamper protection circuitry. A transducer outputs a signal to the switching circuitry electrically connecting the power source to the anti-tamper protection circuitry in response to a tampering event. The switching circuitry otherwise disconnects the power source from the anti-tamper protection circuitry to save power.