Invention Application
US20160172355A1 METHOD OF FORMING A GATE SHIELD IN AN ED-CMOS TRANSISTOR AND A BASE
OF A BIPOLAR TRANSISTOR USING BICMOS TECHNOLOGIES
审中-公开
使用BICMOS技术在ED-CMOS晶体管中形成栅极屏蔽的方法和使用双极晶体管的基板
- Patent Title: METHOD OF FORMING A GATE SHIELD IN AN ED-CMOS TRANSISTOR AND A BASE OF A BIPOLAR TRANSISTOR USING BICMOS TECHNOLOGIES
- Patent Title (中): 使用BICMOS技术在ED-CMOS晶体管中形成栅极屏蔽的方法和使用双极晶体管的基板
-
Application No.: US15050684Application Date: 2016-02-23
-
Publication No.: US20160172355A1Publication Date: 2016-06-16
- Inventor: Jeffrey A. Babcock , Alexei Sadovnikov
- Applicant: Texas Instruments Incorporated
- Main IPC: H01L27/06
- IPC: H01L27/06 ; H01L29/40 ; H01L29/06 ; H01L29/78
Abstract:
A method of fabricating a MOSFET transistor in a SiGe BICMOS technology and resulting structure having a drain-gate feedback capacitance shield formed between a gate electrode and the drain region. The shield does not overlap the gate and thereby minimizes effect on the input capacitance of the transistor. The process does not require complex or costly processing since the shield is composed of bipolar base material commonly used in SiGe BICMOS technologies.
Public/Granted literature
- US09633994B2 BICMOS device having commonly defined gate shield in an ED-CMOS transistor and base in a bipolar transistor Public/Granted day:2017-04-25
Information query
IPC分类:
