发明申请
US20160218747A1 BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 16200 AND CODE RATE OF 2/15 AND 256-SYMBOL MAPPING, AND BIT INTERLEAVING METHOD USING SAME
审中-公开
具有16200长度的密度奇偶校验码的比特交换机和2/15和256符号映射的编码速率以及使用相同的比特交换方法
- 专利标题： BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 16200 AND CODE RATE OF 2/15 AND 256-SYMBOL MAPPING, AND BIT INTERLEAVING METHOD USING SAME
- 专利标题（中）： 具有16200长度的密度奇偶校验码的比特交换机和2/15和256符号映射的编码速率以及使用相同的比特交换方法
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申请号： US14718600申请日： 2015-05-21
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公开(公告)号： US20160218747A1公开(公告)日： 2016-07-28
- 发明人: Sung-Ik PARK , Sun-Hyoung KWON , Bo-Mi LIM , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
- 申请人： ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
- 优先权： KR10-2015-0012878 20150127
- 主分类号： H03M13/27
- IPC分类号： H03M13/27 ; H04L1/00 ; H03M13/11
摘要：
A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.
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