发明申请
- 专利标题: SEMICONDUCTOR DEVICE, FABRICATING METHOD THEREOF AND SEMICONDUCTOR PACKAGE INCLUDING THE SEMICONDUCTOR DEVICE
- 专利标题(中): 半导体器件及其制造方法及其半导体器件包括半导体器件
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申请号: US15130904申请日: 2016-04-15
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公开(公告)号: US20160233155A1公开(公告)日: 2016-08-11
- 发明人: Ho-Jin LEE , Tae-Je CHO , Dong-Hyeon JANG , Ho-Geon SONG , Se-Young JEONG , Un-Byoung KANG , Min-Seung YOON
- 申请人: Ho-Jin LEE , Tae-Je CHO , Dong-Hyeon JANG , Ho-Geon SONG , Se-Young JEONG , Un-Byoung KANG , Min-Seung YOON
- 优先权: KR10-2010-0119757 20101129
- 主分类号: H01L23/498
- IPC分类号: H01L23/498 ; H01L23/48
摘要:
In one embodiment, a semiconductor device includes a semiconductor substrate having a first surface, and a second surface opposite to the first surface. The second surface defines a redistribution trench. The substrate has a via hole extending therethrough. The semiconductor device also includes a through via disposed in the via hole. The through via may include a via hole insulating layer, a barrier layer, sequentially formed on an inner wall of the via hole. The through via may further include a conductive connector adjacent the barrier layer. The semiconductor device additionally includes an insulation layer pattern formed on the second surface of the substrate. The insulation layer pattern defines an opening that exposes a region of a top surface of the through via. The semiconductor devices includes a redistribution layer disposed in the trench and electrically connected to the through via. The insulation layer pattern overlaps a region of the conductive connector.
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