A peak detector circuit comprises a first output coupled to ground by a first load and to emitter terminals of first and second switching devices. A second output is coupled to ground by a second load and to emitter terminals of third and fourth switching devices. A third output is coupled to a supply voltage node by a third load and to collector terminals of the first and second switching devices. A fourth output is coupled to the supply voltage node by a fourth load and to collector terminals of the third and fourth switching devices. The first, second, third, and fourth switching devices have control terminals which are biased with a common bias voltage. The first, second, third and fourth load are selected so that R1=R2=αf*R3=αf*R4, with R1, R2, R3, R4 being a resistance of the first, second, third and fourth loads, respectively, and αf a common-base current gain of the switching devices.