Invention Application
US20160240367A1 METHOD FOR FORMING FILM HAVING LOW RESISTANCE AND SHALLOW JUNCTION DEPTH
有权
用于形成具有低电阻和短截面深度的膜的方法
- Patent Title: METHOD FOR FORMING FILM HAVING LOW RESISTANCE AND SHALLOW JUNCTION DEPTH
- Patent Title (中): 用于形成具有低电阻和短截面深度的膜的方法
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Application No.: US14622603Application Date: 2015-02-13
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Publication No.: US20160240367A1Publication Date: 2016-08-18
- Inventor: Yosuke Kimura , David de Roest
- Applicant: ASM IP Holding B.V.
- Main IPC: H01L21/02
- IPC: H01L21/02
Abstract:
A method for forming on a substrate a doped silicon oxide film with a cap film, includes: forming an arsenosilicate glass (ASG) film as an arsenic (As)-doped silicon oxide film on a substrate; continuously treating a surface of the ASG film with a treating gas constituted by Si, N, and H without excitation; and continuously forming a silicon nitride (SiN) film as a cap film on the treated surface of the ASG film.
Public/Granted literature
- US09478415B2 Method for forming film having low resistance and shallow junction depth Public/Granted day:2016-10-25
Information query
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