Invention Application
US20160351690A1 METHOD OF FORMING HIGH VOLTAGE METAL-OXIDE-SEMICONDUCTOR TRANSISTOR DEVICE
有权
形成高电压金属氧化物半导体晶体管器件的方法
- Patent Title: METHOD OF FORMING HIGH VOLTAGE METAL-OXIDE-SEMICONDUCTOR TRANSISTOR DEVICE
- Patent Title (中): 形成高电压金属氧化物半导体晶体管器件的方法
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Application No.: US15231792Application Date: 2016-08-09
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Publication No.: US20160351690A1Publication Date: 2016-12-01
- Inventor: Ming-Shun Hsu
- Applicant: UNITED MICROELECTRONICS CORP.
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/423 ; H01L29/78 ; H01L29/10
Abstract:
A method of forming a HVMOS transistor device is provided. A substrate is provided. A first insulation structure and a trench are formed in the substrate. A base region having a second conductivity type is formed, wherein the base region completely encompasses the trench. Next, a gate dielectric layer and a gate structure are formed in the trench and covering a portion of the first insulation structure. Then, a drain region and a source region are formed in the substrate at two respective sides of the gate structure, and the drain region and the source region comprise a first conductivity type complementary to the second conductivity type. A channel is defined between the source region and the drain region along a first direction.
Public/Granted literature
- US09825147B2 Method of forming high voltage metal-oxide-semiconductor transistor device Public/Granted day:2017-11-21
Information query
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