Invention Application
US20170005014A1 TEST STRUCTURE MACRO FOR MONITORING DIMENSIONS OF DEEP TRENCH ISOLATION REGIONS AND LOCAL TRENCH ISOLATION REGIONS 审中-公开
用于监测深层隔离区域和局部分离区域的尺寸的测试结构

TEST STRUCTURE MACRO FOR MONITORING DIMENSIONS OF DEEP TRENCH ISOLATION REGIONS AND LOCAL TRENCH ISOLATION REGIONS
Abstract:
Embodiments are directed to a method Embodiments are directed to a test structure of a fin-type field effect transistor (FinFET). The test structure includes a first conducting layer electrically coupled to a dummy gate of the FinFET, and a second conducting layer electrically coupled to a substrate of the FinFET. The test structure further includes a third conducting layer electrically coupled to the dummy gate of the FinFET, and a first region of the FinFET at least partially bound by the first conducting layer and the second conducting layer. The test structure further includes a second region of the FinFET at least partially bound by the second conducting layer and the third conducting layer, wherein the first region comprises a first dielectric having a first dimension, and wherein the second region comprises a second dielectric having a second dimension greater than the first dimension.
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