发明申请
- 专利标题: Stacked Integrated Circuits with Redistribution Lines
- 专利标题(中): 具有再分配线的堆叠集成电路
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申请号: US15269431申请日: 2016-09-19
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公开(公告)号: US20170005076A1公开(公告)日: 2017-01-05
- 发明人: Cheng-Ying Ho , Jeng-Shyan Lin , Wen-I Hsu , Feng-Chi Hung , Dun-Nian Yaung , Ying-Ling Tsai
- 申请人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 主分类号: H01L25/065
- IPC分类号: H01L25/065 ; H01L23/00 ; H01L25/00 ; H01L21/768
摘要:
An integrated circuit structure includes a first and a second semiconductor chip. The first semiconductor chip includes a first substrate and a first plurality of dielectric layers underlying the first substrate. The second semiconductor chip includes a second substrate and a second plurality of dielectric layers over the second substrate, wherein the first and the second plurality of dielectric layers are bonded to each other. A metal pad is in the second plurality of dielectric layers. A redistribution line is over the first substrate. A conductive plug is electrically coupled to the redistribution line. The conductive plug includes a first portion extending from a top surface of the first substrate to a bottom surface of the first substrate, and a second portion extending from the bottom surface of the first substrate to the metal pad. A bottom surface of the second portion contacts a top surface of the metal pad.
公开/授权文献
- US10269768B2 Stacked integrated circuits with redistribution lines 公开/授权日:2019-04-23