Invention Application
- Patent Title: CLASS-D AMPLIFIER CIRCUITS
- Patent Title (中): CLASS-D放大器电路
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Application No.: US15278862Application Date: 2016-09-28
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Publication No.: US20170019079A1Publication Date: 2017-01-19
- Inventor: John P. Lesso , Toru Ido
- Applicant: Cirrus Logic International Semiconductor Ltd.
- Priority: GB1318745.5 20131023
- Main IPC: H03F3/217
- IPC: H03F3/217 ; H03G1/00 ; H03F3/187

Abstract:
Methods and apparatus for Class-D amplifier circuits with improved power efficiency. The circuit has an output stage with at least first and second switches and a modulator that receives an input signal to be amplified, SIN, and a first clock signal fSW. The modulator controls the duty cycles of the first and second switches, within a switching cycle based on the input signal, wherein the switching cycle has a switching frequency based on the first clock signal. A frequency controller controls the frequency of the first clock signal in response to an indication of the amplitude of the input signal so as to provide a first switching frequency at a first input signal amplitude and a second, lower, switching frequency at a second, lower, input signal amplitude. A lower switching frequency can be tolerated at low signal amplitudes and varying the switching frequency in this way thus maintains stability whilst reducing switching power losses.
Public/Granted literature
- US09787261B2 Class-D amplifier circuits Public/Granted day:2017-10-10
Information query
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