Invention Application
US20170025308A1 METHOD OF CLEANING BOTTOM OF VIA HOLE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
审中-公开
清洁孔的底部的方法和制造半导体器件的方法
- Patent Title: METHOD OF CLEANING BOTTOM OF VIA HOLE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
- Patent Title (中): 清洁孔的底部的方法和制造半导体器件的方法
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Application No.: US15065667Application Date: 2016-03-09
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Publication No.: US20170025308A1Publication Date: 2017-01-26
- Inventor: Kenji MATSUMOTO
- Applicant: Tokyo Electron Limited
- Priority: JP2015-047015 20150310
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L21/306

Abstract:
In a method of cleaning a bottom of a via hole, a copper oxide on a surface of an underlying Cu wiring exposed at the bottom of the via hole is removed before forming a Cu wiring in a trench and the via hole extended between the trench and the underlying Cu wiring. The trench and the via hole are formed in a predetermined pattern in an interlayer insulating film of a substrate. Reducing species containing a metal in a state capable of reducing the copper oxide is supplied to the bottom of the via hole. The metal has a higher oxidation tendency than Cu and an oxide of the metal has a lower electrical resistance than the copper oxide. The copper oxide is removed by reducing the copper oxide and the oxide of the metal is generated through a reaction between the metal in the reducing species and the copper oxide.
Information query
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