A method of fabricating a semiconductor device, the method including forming at least one interconnection structure that includes a metal interconnection and a first insulating pattern sequentially stacked on a substrate; forming barrier patterns covering sidewalls of the interconnection structure; forming second insulating patterns at sides of the interconnection structure, the second insulating patterns being spaced apart from the interconnection structure with the barrier patterns interposed therebetween; forming a via hole in the first insulating pattern by etching a portion of the first insulating pattern, the via hole exposing a top surface of the metal interconnection and sidewalls of the barrier patterns; and forming a via in the via hole.